14:42:59 #startmeeting Porting Fedora to AArch 64 14:42:59 Meeting started Fri Aug 9 14:42:59 2013 UTC. The chair is jsmith. Information about MeetBot at http://wiki.debian.org/MeetBot. 14:42:59 Useful Commands: #action #agreed #halp #info #idea #link #topic. 14:43:28 Outline of what he's going to talk about 14:43:39 #topic Outline 14:43:47 64-bit architecture 14:43:52 compatibility with 32-bit 14:43:56 standardization 14:44:00 Design 101 14:44:03 Bootstrapping 101 14:44:18 #topic Pretty picture of a development platform 14:44:34 Jon showing an FPGA development board 14:44:56 and talking about bringing up hardware designs on FPGAs 14:45:47 If you have six of the biggest FPGA on the market (worth $50k), you can almost emulate the AArch64 processor design 14:46:27 It's not fast 14:46:38 Like the aarch64 'fast' model 14:46:41 but you can test things before you go to a big foundry and spend millions of dollars on silicon 14:47:06 #topic 64-bit architecture (aarch64) 14:47:15 Brand new ARM architecture 14:47:33 AArch64 is a 64-bit Execution state 14:47:43 AArch32 is a 32-bit execution state 14:48:12 It's a RISC-like architecture 14:48:21 Try to simplify the instruction set 14:48:55 Load/Store, Register-to-register 14:49:16 https://plus.google.com/hangouts/_/e489ec41bc9daac9531cbba9c5f26e67564b1c34 14:49:19 its live now 14:49:25 ARM boards tend to be more power efficient, and less expensive 14:49:31 zoglesby: ^^^ link 14:49:55 thanks all 14:51:24 (AArch32/A32 is a new name for the legacy 32-bit ARM architectures) 14:51:52 fscking git clone at only 18% 14:52:23 Thumb2 is now called T32 14:52:24 jsmith: flock-ectr109 camera is pointed off to the side 14:52:28 The old Thumb is dead 14:52:39 zoglesby: It's being fixed 14:52:54 64-bit clean arch 14:53:03 Every instruction is 32-bits wide (one word per instruction) 14:53:17 Consistent register locations, easy decode 14:53:31 Dedicated 64/32-bit operations 14:53:38 Greater addressing mode flexibility 14:54:01 * 4GB L/S in two, 1MB/128MB cond|uncond jumps 14:56:59 armv8 assembly will be awesomer 14:57:38 #link Google hangout at https://plus.google.com/hangouts/_/e489ec41bc9daac9531cbba9c5f26e67564b1c34 14:57:46 31 general purpose registers 14:58:42 "The problem with the 32-bit architecture was that it was designed in a shack" 15:00:55 No direct access to program counter 15:01:15 Special SP/ZR stack pointer/zero "register" 15:01:55 Three profiles: 15:02:07 * A, R, and M 15:02:10 Just realized g hangouts video is mirrored 15:02:34 Don't see how to fix 15:02:37 handsome_pirate: Yeah, don't worry about it 15:02:44 Don't want to mommick it since I might bork it 15:03:04 Floating-point -- finally standardized, without overlapping registers! 15:03:52 Optional crypto as well... 15:04:19 co-processors are gone 15:04:32 ... just more registers instead 15:04:38 hinting instructions are added 15:05:16 Global Interrupt Controller (handle thousands of processors) 15:05:28 Only four Exception Levels 15:05:59 EL3 is "Secure World" -- things like secure payments processing 15:06:21 The OS for EL3 is called the TEE -- trusted execution environment 15:06:24 You don't care about EL3 15:06:30 EL2 is the hypervisor 15:06:34 Kernel runs at EL1 15:06:36 Looks like writing assembly on armv8 will be pretty nice 15:06:45 Userspace runs at EL0 15:07:02 Memory management 15:07:13 64k pages, 4k pages, and something else (hand waving) 15:08:14 XN (Execute Never) support (similar to NX support on x86) 15:08:37 You can have memory locations that you can execute but not read from 15:09:06 #topic Compatibility with 32-bit 15:09:08 There is none :-) 15:09:36 You could run a 32-bit VM on a 64-bit hypervisor 15:09:46 #topic Standardization 15:10:05 Helping hands trying to do the right thing 15:10:14 UEFI 2.4 spec just came out 15:10:21 ACPI stuff that Jon can talk about soon 15:10:38 Work on standardization moving forward 15:10:48 #topic Architecture Design 15:10:55 Don't do it in a vacuum 15:11:30 Profile a real computer, look at actual instructions and encodings 15:11:45 Define how to compile code and link it together 15:11:51 Build software models and run test code on it 15:11:56 Port GNU toolchain to it 15:12:07 track revisions to the architecture 15:12:18 Port Linux kernel to the software model 15:12:32 Begin hardware (RTL) design in Verilog 15:12:41 Sytnesize RTL onto an FPGA 15:12:58 Ensure compliance with the AVS (ARM validation suite) 15:13:11 Implement RTL in silicon 15:13:27 Tape-out experimental|production silicon 15:14:42 #topic Bootstrapping 101 15:14:59 We did a "trial run" with ARMv7, to learn lessons that would help us in Aarch64 15:15:11 cross-compile minimal stage 1 15:15:29 Rebuild stage 1 natively to get stage 2 15:15:39 Stage 3 provides full deps for rpmbuild 15:15:46 Stage 4 provides full deps for Koji 15:16:01 Stage 5 is complete mass rebuild on hardware 15:17:23 Status: Side rebuild of Fedora 19 largely in place 15:17:31 Majority of the package set available 15:17:39 Working on plans for F20, Koji, etc. 15:17:59 Google for "AArch64 Quickstart" if you want to try it out on software emulation 15:18:04 #topic Future 15:18:11 Production hardware coming 15:18:19 Fedora will ship with support for X-Gene 15:18:29 * boot using UEFI, ACPI, standards 15:19:00 Linaro Enterprise Group (LEG) 15:19:21 Hyperscale Computing 15:19:28 Demo will happen in his next talk 15:19:36 #endmeeting